Dr. Arun Kumar

July 19, 2022 by Arun Kumar
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Arun_pic    Assistant Professor 

    Department of Electronics and Communication Engineering

    National Institute of Technology Silchar

    Phone: +91-9431404941
    Date of Joining: 14/07/2022
    Academic Experience: 2+ years
    Personal Webpage: http://ec.nits.ac.in/arunkumar/

ACADEMIC QUALIFICATIONS

  • B.E.    : RTM Nagpur University, Nagpur, India, 2014
  • Ph.D. : Indian Institute of Technology Patna, India, 2020

EXPERIENCE

  • July 2022 – Till date:  Assistant Professor Grade-II, National Institute of Technology (NIT) Silchar, Assam, 788010, India
  • July 2021 – July 2022:  Assistant Professor, Thapar Institute of Engineering & Technology (Deemed to be University), Patiala, Punjab, 147004, India

 RESEARCH OPPORTUNITIES

  • Ph.D. positions available under Institute Fellowship (Vacancy = 02)
  • PhD position under Inspire Fellowship Awardees/ UGC-CSIR-NET(JRF) /Part-time category are also available.

RESEARCH INTERESTs AND SPECIALIZATION

  • SPICE/Compact modeling of Bulk/SOI MOSFET, Multigate FET, Nanowire, Nanosheet/Nanaotube devices
  • TCAD Simulation of nanoscale and emerging transistor architectures 
  • Analog circuits design and analysis
  • Computational Nanoelectronics/Quantum modeling
  • Statistical analysis of Reliability issues/Self-heating/Stress
  • Machine learning based device modeling
  • Non-volatile memory/RRAM/SRAM/Memristor

SHORT BIOGRAPHICAL SKETCH

Dr. Arun Kumar is presently working as an Assistant Professor in the ECE Department, National Institute of Technology, Silchar since July 2022. Dr. Arun has received his Ph.D. degree in Microelectronics from IIT Patna, India in 2020.  Prior to joining NIT Silchar, he had worked as an Assistant Professor in the ECE Department, TIET, Patiala, India. He was awarded junior research fellowship and Senior research fellowship by CSIR, Government of India in 2016 and 2018, respectively. Dr. Arun is receipient of Foreign travel grant from CSIR, International travel grant from SERB, Govt. of India. Dr. Arun has published several research papers in reputed Journals and presented his research work at flagship IEEE conferences in India and abroad.

PROJECT(S)

  1. Development of a machine learning framework to accelerate prediction of self-heating-driven reliability issues in emerging nanosheet transistors, SERB, Govt. of India (2023-2025), INR 26.43 Lakhs
  2. Compact modeling and quantum transport simulation NSFETs for next generation circuit applications, Seed Research Grant, TIET Patiala, (2022), INR 4 Lakhs
  3. Compact model development for sub 7-nm NSFETs, SERB, Govt. of India, awarded under National Post-Doc Fellowship (2020), INR 19.20 Lakhs 

BOOKS/CHAPTERS

  1. Arun Kumar, and Pramod Kumar Tiwari, Silicon Nanotube FETs: From device concept to analytical model development, Cutting-Edge Research on Low-Dimensional Nanoelectronic Devices: Physics and Material Science Aspects, Apple Academic Press, USA, (ISBN: 9781774638668).

PUBLICATION (JOURNALS)

  1. Arun Kumar, Shiv Bhushan, and Pramod Kumar Tiwari, “A Threshold Voltage Model of Silicon- Nanotube Based Ultra-Thin Double Gate-All-Around (DGAA) MOSFETs Incorporating Quantum Confinement Effects,” IEEE Transactions on Nanotechnology, vol. 16, no. 5 , pp 868-875, Sept. 2017.
  2. Arun Kumar, Shiv Bhushan, and Pramod Kumar Tiwari, “Analytical modeling of subthreshold characteristics of ultra-thin double gate-all-around (DGAA) MOSFETs incorporating quantum confinement effects,” Superlattices and Microstructures, vol. 109, pp. 567-578, May 2017.
  3. Arun Kumar, Pramod Kumar Tiwari “An Explicit Unified Drain Current Model for Silicon-Nanotube- Based Ultrathin Double Gate-All-Around MOSFETs” IEEE Transactions on Nanotechnology, vol. 17, no. 6,, pp 1224-1234, Nov. 2018.
  4. Arun Kumar, Shiv Bhushan, and Pramod Kumar Tiwari “Drain current modeling of double gate-all- around (DGAA) MOSFETs”, IET Circuits, Devices & Systems, vol. 13, no. 4, pp. 519-525, July 2019.
  5. Arun Kumar, P.S.T.N. Srinivas, and Pramod Kumar Tiwari, “An Insight into Self-heating Effects and its Implications on Hot Carrier Degradation for Silicon-Nanotube-based double gate-all-around (DGAA) MOSFETs,” IEEE Journal of Electron Devices Society, vol. 7, pp. 1100-1108, Nov. 2019.
  6. Arun Kumar, P S T N Srinivas, S. Bhushan, S Dubey, Y K Singh and P. K. Tiwari “Threshold Voltage Modeling of Double Gate-All-Around Metal-Oxide-Semiconductor Field-Effect-Transistors (DGAA MOSFETs) Including the Fringing Field Effects”, Journal of Nanoelectronics and Optoelectronics, Vol. 14, pp. 1–10, Nov. 2019.
  7. P.S.T.N. Srinivas, Arun Kumar, and Pramod Kumar Tiwari, “A Threshold Voltage Model of Tri-Gate Schottky-Barrier (TGSB) Field-Effect-Transistors (FETs)” Silicon, Vol. 13, pp. 25–35 Jan. 2021.
  8. P.S.T.N. Srinivas, Arun Kumar, and Pramod Kumar Tiwari, “Self-heating Effects and Hot Carrier Degradation in In0.53Ga0.47As Gate-All-Around (GAA) MOSFETs” Semiconductor Science and Technology, Vol. 35, pp. 065008-1-8, May 2020.
  9. P.S.T.N. Srinivas, Arun Kumar, and Pramod Kumar Tiwari, “Effect of self-heating on small-signal parameters of In0.53Ga0.47As based gate-all-around MOSFETs” Semiconductor Science and Technology, Vol. 36, pp. 125012-1-8, Nov. 2021.
  10. S. Singh, , P.S.T.N. Srinivas, A. Kumar et al. Physical Insight into Self-heating Induced Performance Degradation in RingFET. Silicon (2021). https://doi.org/10.1007/s12633-021-01491-9
  11. P Srinivas, NA Kumari, A. Kumar, PK Tiwari, KG Sravani, Impact of ambient temperature on CombFET for sub-5-nm technology nodes: An RF performance perspective  Microsystem Technologies, 1-9, 2024
  12. A Maniyar, P Raj, P Srinivas, A. Kumar, KS Chang-Liao,, Impact of Process-Induced Inclined Side-Walls on Gate Leakage Current of Nanowire GAA MOSFETs,   P.K Tiwari,  IEEE Transactions on Electron Devices, 2024
  13. TS Kumar, A Hazarika, P Srinivas, P.K. Tiwari, A. Kumar , A machine learning approach to accelerate reliability prediction in nanowire FETs from self-heating perspective, Microelectronics Reliability,  161, 115484, 2024

PUBLICATION (CONFERENCES)

  1. Arun Kumar, P.S.T.N. Srinivas, and Pramod Kumar Tiwari, ” Analytical Threshold Voltage Model of Schottky-source/drain (Schottky-S/D) double gate-all-around  (DGAA)  Field-Effect-Transistors  (FETs),” 2019 IEEE Devices for Integrated Circuit (DevIC), Kalyani, March 2019.
  2. Arun Kumar, P.S.T.N. Srinivas, and Pramod Kumar Tiwari, “Physical Insight into Self-heating Effects in Ultra-thin Junctionless Gate-All-Around FETs,” 9th IEEE International Nanoelectronics Conference (INEC), Kuching, Malaysia, July 2019
  3. Arun Kumar, P.S.T.N. Srinivas, and Pramod Kumar Tiwari, “Compact Drain Current Model of Silicon- Nanotube-based  Double  Gate-All-Around  (DGAA)  MOSFETs  Incorporating  Short   Channel Effects,” 14th IEEE Nanotechnology Materials and Devices Conference (NMDC), Stockholm, Oct. 2019
  4. Shiv Bhushan, Arun Kumar, Deepti Gola, and Pramod Kumar Tiwari, “An analytical subthreshold current model of short-channel symmetrical double gate-all- around (DGAA) field-effect-transistors” 2nd International conference 2017 Device for integrated circuits (DevIC), pp.8-12, 2017.
  5. P.S.T.N. Srinivas, Arun Kumar, and Pramod Kumar Tiwari, “Effects of Lateral Spreading in 2- Dimensional Non-Uniform Doped Junctionless FinFETs,” 9th IEEE International Nanoelectronics Conference (INEC), Kuching, Malayisia, July 2019
  6. Pramod Kumar Tiwari, Arun Kumar and Dipankar Talukdar, “An analytical gate tunneling current model of Re-S/D SOI MOSFETs,” 2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON), Varanasi, pp. 29-31, 2016.
  7. Arun Kumar, P.S.T.N. Srinivas, and Pramod Kumar Tiwari, “Analytical Modeling of Subthreshold Current and Subthreshold Swing of Schottky-Barrier Source/Drain Double Gate-All-Around (DGAA) MOSFETs” 5th IEEE iSES, Rourkela, 2019.
  8. P. S. T. N. Srinivas, A. Kumar and P. K. Tiwari, “In0.53Ga0.47As Nanosheet MOSFETs with Self-Heating Effects,” 2022 IEEE Silchar Subsection Conference (SILCON), Silchar, India, 2022, pp. 1-6, doi: 10.1109/SILCON55242.2022.10028932.
  9. S. Kumar, K. M. Devi and A. Kumar, “Investigation of HCI Effect and BTBT Supported High Ion/Ioff in Split Double-Gate Junctionless FETs,” 2024 Joint International Conference on Digital Arts, Media and Technology with ECTI Northern Section Conference on Electrical, Electronics, Computer and Telecommunications Engineering (ECTI DAMT & NCON), Chiang-mai, Thailand, 2024, pp. 50-54, doi: 10.1109/ECTIDAMTNCON60518.2024.10480057.

PROFESSIONAL MEMBERSHIPS

  • Member, IEEE
  • Member, IEEE Electron Device Society
  • IEEE Young Professionals
  • IEEE Nanotechnology Council
  • Member, IEEE TechEthics Community

AWARDS & RECOGNITIONS

  • 2015- CSIR-NET (JRF) with All India Rank-139
  • 2014, 2015- Qualified Graduate Aptitude Test in Engineering
  • 2016-2018, Junior Research Fellowship for PhD- CSIR, Government of India.
  • 2018-2020, Senior Research Fellowship for PhD- CSIR, Government of India.
  • 2019- International Travel Grant for 14th NMDC at Stockholm, Sweden- Science and Engineering Research Board (SERB), Government of India.
  • 2019- International Travel Grant for 9th INEC at Kuching, Malaysia – Council of Scientific and Industrial Research (CSIR), Government of India.
  • 2019- First position in Poster Presentation- Research Scholars’ Day, Indian Institute of Technology Patna.
  • 2014 – University 2nd rank in B.E. Final Exam.

ADMINISTRATIVE RESPONSIBILITY

  1. Warden, Visvesvaraya Hostel (Hostel No. 8), NIT Silchar (6th January 2025 – continue)
  2. Associate/Assistant Warden, Visvesvaraya Hostel (Hostel No. 8), NIT Silchar (4th January 2023 – 5th January 2025 )
  3. Department Training & Placement Coordinator (11th August 2023 -continue)
  4. Member, Hindi Cell,  NIT Silchar (6th Dec. 2023 – continue)
  5. Member, DUPC, Dept. of ECE (1st April 2024 – continue)
  6. Convener, Dept. Committee for Company Evaluation for Internship (10th Nov. 2023 – continue)

Ph.D. Scholars

  1. K Mamota Devi (Ministry of Education (MoE) Fellowship, ongoing)
  2. Venkateswara Rao Busani (QIP Fellowship, ongoing)
  3. P Siva Durga Rao (Part-time, Ongoing)

M.Tech students

  1. Subhash Kumar (PhD Student, IIT Gandhinagar)
  2. Mohit Dutt Mathur ( R & D Developer, Orbital Mekatronik Systems)
  3. Anisha Samantha (Ongoing)

B.Tech. Projects

  1. G. Anith Chaudhary  –  M.S (Analog and Mixed signal Design), Arizona State University, USA
  2.  T. Sandeep Kumar, SDE, Infoedge Pvt. Ltd.
  3. Anusha Hazarika, Cloud Engineer, Optum

Workshops Organized

  1. 5 days workshop on Emerging Cutting Edge Technologies in CMOS: Trends and Challenges sponsored by IEEE EDS SB, NIT Silchar (11-15 Dec. 2024)- Coordinator
  2. 2-Days Hands-on-Training on Global TCAD Simulator tool (14-15 Dec. 2024) Sponsored by SERB under SSR-Coordinator

 TPC Member/Reviewer/ Track Chair 

Sl. No. Name Date Location Role
1 6th INTERNATIONAL CONFERENCE ON INNOVATIVE TRENDS IN INFORMATION TECHNOLOGY 2025 2/21/2025 Kottayam, India  Reviewer
2 Micro/Nanoelectronics Devices, Circuits, & Systems 1/29/2025 Silchar, India  Reviewer
3 International Conference on Communication, Computing, Smart Materials and Devices 2024 12/19/2024 Chennai, India  Reviewer
4 Fourth International Conference on Emerging Electronics and Automation 2024 12/9/2024 Silchar, Assam, India  Track chair
5 2024 IEEE Silchar Subsection Conference 11/15/2024 Agartala, India  Track chair
6 8th Students’ Conference on Engineering & Systems (SCES-2024) 6/21/2024 Prayagraj, India  Reviewer
7 4th International Conference on Micro/Nanoelectronics Devices, Circuits and Systems 2024 1/29/2024 Silchar, India  Reviewer
8 International Conference on Innovative Trends in Information Technology 2024 11/1/2023 Kottayam, India  Reviewer
9 International Conference on Communication Systems 12/21/2023 Karaikal, India  Reviewer
10 Third International Conference on Emerging Electronics and Automation (E2A) 2023 12/15/2023 Silchar, India  Reviewer
11 IEEE SECOND INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTATIONAL INTELLIGENCE AND COMMUNICATION 12/7/2023 PUDUCHERRY, INDIA  Reviewer
12 2023 IEEE Silchar Subsection Conference (SILCON) 11/3/2023 Silchar, India  Track chair
13 6th International Conference on VLSI, Communication and Signal Processing (VCAS 2023) 10/12/2023 PRAYAGRAJ, INDIA  Reviewer
14 First International Conference on Signal Processing, Computation, Electronics, Power and Telecommunication 5/25/2023 Karaikal, India  Reviewer